RISC-V : The Last ISA?

Will we ever need another one?

RISC - V Prototype

The theme of this newsletter is the history of computing. In general, I’d like to allow the reader to use lessons from the past to draw their own conclusions about the future.

Occasionally though, I’d to have some fun by explicitly looking forward. This is especially true when the topic is that of Instruction Set Architectures (ISAs). This is partly because ISAs can have such a long history. You may get a new microarchitecture every Christmas, but ISAs are for life. S/360 has been around since the 1960s. x86 since 1976. They have both evolved significantly, but core elements of the architectures survive.

A few days ago, I was pondering Wikipedia’s helpful list of ISA’s when I changed the sort order to arrange the ISA’s by date of introduction. Immediately, one thing jumped out. Since 2010 there have been only three ISAs that reached sufficient notability to feature on the list. These are RISC-V (2010), Arm64 (2011) and Elbrus (2014).

Now we can quibble a little about the date of introduction here. The RISC-V project started in 2010, but the design of the ISA has evolved over the 2010s, with some elements only being finally ratified in 2021. I think that really RISC-V should be listed as the most recent ISA on this list.

It’s notable how few ISA’s have emerged over this period. There are 42 ISAs on the list, which starts in 1963 with CDC Upper 3000. So that’s 37 ISAs over the previous 47 years and only 3 over the last 13.

Now, there may be something of a time lag effect. It will take a while after an ISA has been developed for it to become notable. Even so, I think that this is reflective of some profound changes.

Why has this happened, and what does it mean for the future?

First it’s likely to be a sign that CPU ISAs are, to some extent, done. We haven’t had a shift since 2010 or so – such as 32 to 64 bit or CISC to RISC – that has led to the need for a range of new ISAs. There are no radically new concepts on the immediate horizon that look likely to displace the approach adopted in existing architectures.

Second, it reflects the emergence of business models that make ISA’s more widely available through licensing. Arm pioneered making CPU designs available for purchase by third parties, and then extended that to allow a small set of customers to license just the ISA and build their own designs. RISC-V has extended this concept by making the ISA itself open source.

So with RISC-V around, why would anyone develop their own ISA? You can get a good one for free, so why waste time writing your own? Perhaps more importantly, if you do create your own, you won’t have access to all the software tools that you probably need to support your project. Writing them yourself will be either impossible or prohibitively expensive. And if you need instructions that aren’t included in existing extensions, then it’s possible to add your own.

Which is not to imply that RISC-V is incapable of improvement. Rather, that the benefits of replacing it would likely be small relative to the costs.

Is RISC-V the last ISA? If so, it’s a slightly scary prospect. My answer would be yes and no.

The yes response derives from the fact that I find it hard to believe that there will be, for quite a while at least, another ISA that gains a foothold in the mainstream application processor market. x86, Arm and RISC-V will crowd out all potential newcomers for a long time.

The first part of the no response is that, of course, there are whole classes of ISA’s that aren’t listed on the Wikipedia page. Those for accelerators, for GPUs and so on. These are often hidden away from application programmers, and so can continue to develop and evolve.

And this is where the focus and the money is and will increasingly be. With the growth of applications of artificial intelligence, the drive to squeeze the most parallel compute out of GPUs and other hardware will continue.

The second no lies with RISC-V itself. The ability to add extensions onto the architecture makes it less of an ISA and more of a family of ISAs. This allows the ISA to evolve and adapt to changing circumstances as time goes on.

Other architectures have evolved. x86 CPUs today have backwards compatibility with the original architecture, but the actual instructions that they run look nothing like an 8086.

RISC-V is different, though. No single entity has control over the ISA in all its implementations. This is great for innovation as firms can trial different approaches and tailor the ISA to the needs of their customers.

There is a downside, though. What happens if a large firm takes RISC-V and forks it?

This may not be intentionally nefarious. In the world of web browsers, Blink is a fork of Webkit, which in turn is a fork of KHTML. In each case, it suited Apple and then Google to take control of their code, but the forked code was also open source.

A RISC-V fork could be open sourced, but it’s not certain. I can see different scenarios where the commercial case could point in different directions. Gain advantage over competitors by creating a moat around your designs, or continue to benefit by sharing costs with others.

We already have smaller firms offering proprietary extensions. Why wouldn’t a larger firm want to do the same or go even further with a fork?

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My best guess then is that RISC-V isn’t the last ISA. But it will be the ancestor of all future ISAs.

What do you think? Is there a new approach just over the horizon? Will RISC-V be forked. Please share your views in the comments.

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