Almost two years ago I shared what Intel called ‘the next major step in the evolution of Intel Architecture’, APX.
Intel APX
Intel has just announced APX, “the next major step in the evolution of Intel® architecture”:
In that post we saw that the most significant changes proposed were that APX:
Doubles the number of general purpose registers from 16 to 32;
New three operand instructions (e.g. adding ability to subtract register1 from register2, and place the result in register3);
New instructions to PUSH / POP two general purpose registers at once;
New conditional load, store and compare instructions;
Adds the option to suppress status flag writes for common instructions;
New 64-bit absolute jump instruction.
Along with these additions we noted that Intel was also proposing the removal of some ‘legacy’ features' in a simplification it called X86-S (or X86S):