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What an absolute pity this didn't become the standard at this point in time.

Ps: I'm guessing something else was to be added here?

The simplicity of the instruction set meant that a simple pipelined operation could be implemented. #Add

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It's interesting how close IBM came to having a 'winning' RISC processor. I worked briefly at IBM in the 1980s and it was full of competing projects and there was little overall vision - at least for smaller systems. It worked in some ways but I'm not surprised that some great ideas never made it into successful products. If the idea threatened someone's existing business then there is a good chance that it wouldn't be promoted or supported.

Thanks again on the typo!

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The first RISC processor to market though seems to have been from Linkabit and Erwin Jacobs.

https://youtu.be/exxTpo7rzxA?t=148

Reading all this, it hurts to realize how much of computing history has been lost to NDAs. It's really Infuriating, your writing goes some way in preserving it though. Well done.

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Hi Jon, Thanks so much for this, for your kind words and for subscribing - really appreciate it.

I have to admit I was only vaguely aware of the Qualcomm story and you've got me really intrigued now. The Linkabit Microprocessor seems to be variously described as RISC or as the first Digital Signal Processor. With 32 instructions it might also qualify it as a Minimal Instruction Set Computer (as per Wikipedia but the distinction seems a bit arbitrary to me!)

Incidentally, it's really interesting how much interesting technology comes from telecoms firms having compute requirements that can't be met by the conventional systems of the day. The IBM RISC project came out of the possible Ericsson Joint Venture, there's your point on Linkabit and I'm reading about Erlang at the moment, which of course also came out of Ericsson (and of course which would probably have been lost if Ericsson hadn't open sourced it).

Thanks again!

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Risk was invented in the '70s and during the 70s 80s and 90s computer speed was doubling every 18 months according to Moore's law. A RISC CPU design to layout and production took one to two years whereas a CISC CPU design took four to five years. This means a RISC CPU was 3 years closer to the state-of-the-art and therefore four times faster than CISC on average

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